Brian Pratt's Homepage

• 1: Welcome
  • 1.1: About Me
• 2: Projects
  • 2.1: Software
    • 2.1.1: Web Cloner
    • 2.1.2: Chess
    • 2.1.3: RCS
  • 2.2: RTOS
  • 2.3: Senior Project
  • 2.4: LANL Internship
  • 2.5: DES Cracker
  • 2.6: Digital Comm
• 3: Research
  • 3.1: FPGAs in Space
  • 3.2: SEU Mitigation
  • 3.3: Partial TMR
  • 3.4: Digital Comm
• 4: Docs
  • 4.1: Linux
  • 4.2: Mac OS X
  • 4.3: Other
• 5: Software
  • 5.1: Geolocator.app
  • 5.2: Awesome Ball
  • 5.3: AccSim
  • 5.4: Roomote
• 6: Resume
• 7: Contact

Resume

Education

• PhD Electrical and Computer Engineering, Brigham Young University - April 2011
  • Graduate GPA: 3.95
  • Research Emphasis: Reliable Digital Communications on FPGAs
  • Dissertation: Analysis and Mitigation of SEU-induced Noise on FPGA-based DSP Systems
  • Coursework:

    Reconfigurable Computing Fault-tolerant Computing High-level Synthesis Embedded Systems Stochastic Processes

    Computer Architecture Computer Arithmetic Digital Communications Error-Control Coding

• BS Computer Engineering, Brigham Young University - April 2005
  • Graduated Magna Cum Laude with 3.92 GPA

Experience

• L-3 Communications - December 2010 - present
  • FPGA Design Engineer in the Advanced Communications and Modem Group
• Brigham Young University - Research Assistant - May 2004-December 2010
  • Researched FPGA reliability (see reliability.ee.byu.edu)
  • Developed tools for manipulating EDIF-level FPGA designs
  • Investigated improvements in Triple Modular Redundancy for FPGA radiation tolerance
  • Wrote and presented research papers at various venues
• Los Alamos National Laboratory - Summer Intern - May-August 2005
  • Developed tools to evaluate FPGA reliability
  • Developed VHDL designs for radiation testing and evaluation
  • Performed FPGA reliability tests at a proton accelerator facility

Publications

• Reduced-Precision Redundancy for Reliable FPGA Communications Systems in High-Radiation Environments. Brian Pratt, Megan Fuller, Michael Rice, and Michael Wirthlin, IEEE Transactions on Aerospace and Electronic Systems, Volume 49, Number 1, pp. 369-380, January 2013.
• Reduced-Precision Redundancy on FPGAs. Brian Pratt, Megan Fuller, and Michael Wirthlin, International Journal of Reconfigurable Computing, vol. 2011, Article ID 897189, 12 pages, 2011.
• Analysis and Mitigation of SEU-induced Noise in FPGA-based DSP Systems. Brian H. Pratt, PhD Dissertation, Brigham Young University, April 2011.
• Reliable Communications Using FPGAs in High-Radiation Environments – Part I: Characterization. Brian Pratt, Megan Fuller, Michael Rice, and Michael Wirthlin, Proceedings of the International Conference on Communications 2010, May 2010.
• Noise Impact of Single-Event Upsets on an FPGA-based Digital Filter. Brian Pratt, Michael Caffrey, Paul Graham, Keith Morgan, and Michael Wirthlin, Proceedings of the 19th International Conference on Field Programmable Logic and Applications, August 2009.
• TMR with More Frequent Voting for Improved FPGA Reliability. Brian Pratt, Michael Caffrey, Derrick Gibelyou, Paul Graham, Keith Morgan, and Michael Wirthlin. The International Conference on Engineering of Reconfigurable Systems and Algorithms, July 2008. Distinguished Paper.
• Fine-Grain SEU Mitigation for FPGAs Using Partial TMR. Brian Pratt, Michael Caffrey, James F. Carroll, Paul Graham, Keith Morgan, and Michael Wirthlin. Transactions on Nuclear Science, Volume 55, Number 4, pp.2274-2280, August 2008.
• A Comparison of TMR With Alternative Fault-Tolerant Design Techniques for FPGAs. Morgan, K.S.; McMurtrey, D.L.; Pratt, B.H.; Wirthlin, M.J.. IEEE Transactions on Nuclear Science, Volume 54, Number 6, pp.2065-2072, December 2007.
• Improving FPGA Design Robustness With Partial TMR. Brian Pratt, Michael Caffrey, Paul Graham, Keith Morgan and Michael Wirthlin. International Reliability Physics Symposium (IRPS), April, 2006.
• SEU-Induced Persistent Error Propagation in FPGAs. Keith Morgan, Michael Caffrey, Paul Graham, D. Eric Johnson, Brian Pratt and Michael Wirthlin. IEEE Transactions on Nuclear Science, Volume 52, Number 6, December 2005.

Projects

• MP3/MPEG-2 System-on-a-Chip. Part of a four-person team which developed a system on a Xilinx Virtex-II Pro board which decoded and played MP3 audio files in real time along with decoding of MPEG-2 video. Simple web server on chip provided user interface with uploading and downloading of media files.

Skills and Interests

Technical Skills

Foreign Language

• Spanish - Two years of church service as a missionary in Spain (2000-2002)

Interests

• Reconfigurable Computing, Embedded Systems, Digital Communications
• iPhone programming (Winner of Omniture iPhone App Competition 2009)
• Member - IEEE Student Chapter, Tau Beta Pi